The Research & Development Cell, SAGE University Indore, is pleased to announce a hands-on workshop on
The Research & Development Cell, SAGE University Indore, is pleased to announce a hands-on workshop on Cadence under the C2S (Chips to Startup) Project. This workshop aims to provide participants with practical exposure to industry-standard Electronic Design Automation (EDA) tools and FPGA-based design methodologies that are widely used in semiconductor, VLSI, and embedded system industries.
Participants will gain insights into tool installation, design workflows, and experimental implementation using Cadence platforms. The session will be conducted by experienced resource persons from IET DAVV, offering valuable guidance on semiconductor design practices and emerging opportunities in the chip design ecosystem.
Resource Persons
* Dr. Vaibhav Neema, C2S-PI & Professor, IET DAVV
* Prof. Rishabh Badjatiya, SRF, C2S Project, IET DAVV
Workshop Details
* Date: 30 June 2026
* Time: 11:00 AM – 3:30 PM
* Venue: A Block, G23
Certificates will be provide to the all registered participants
Key Takeaways
* Installation and configuration of Cadence tool
* Understanding VLSI and semiconductor design workflows
* Hands-on CADENCE experiments
* Exposure to industry-relevant EDA tools and methodologies
* Learning opportunities under the C2S Project
Registration
Don't miss this opportunity to explore industry-leading EDA tools and gain practical experience
